( en | de | ru )

 

Disambiguation

From post

копироватьудалитьдобавить публикацию в буфер
Importance of Single-Core Performance in the Multicore Era.

, , , и . ACSC, том 122 из CRPIT, стр. 107-114. Australian Computer Society, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

Toshinori Kuwahara

Makoto Sato

Nobuko Sato

Fujio Sato

Satô Saburô

 

Другие публикации лиц с тем же именем

The potential in energy efficiency of a speculative chip-multiprocessor., , и . SPAA, стр. 273-274. ACM, (2004)Exploiting Configurability for Correct Sign Calculation in an Approximate Adder., и . ISOCC, стр. 86-87. IEEE, (2018)Influence of Compiler Optimizations on Value Prediction., , , и . HPCN Europe, том 2110 из Lecture Notes in Computer Science, стр. 312-321. Springer, (2001)Topic 4: High-Performance Architecture and Compilers., , , и . Euro-Par, том 7484 из Lecture Notes in Computer Science, стр. 204-205. Springer, (2012)Non-uniform Set-Associative Caches for Power-Aware Embedded Processors., и . EUC, том 3207 из Lecture Notes in Computer Science, стр. 217-226. Springer, (2004)A Selective Replacement Method for Timing-Error-Predicting flip-Flops., , , и . J. Circuits Syst. Comput., (2012)2.44-GFLOPS 300-MHz floating-point vector-processing unit for high-performance 3D graphics computing., , , , , , , , , и . IEEE J. Solid State Circuits, 35 (7): 1025-1033 (2000)Realizing Energy-Efficient MultiCore Processors by Utilizing Speculative Thread-Level Parallelism., , , , , и . Int. J. Comput. Their Appl., 14 (2): 79-91 (2007)Improving timing error tolerance without impact on chip area and power consumption., , и . ISQED, стр. 373-378. IEEE, (2013)Exploiting Configurable Approximations for Tolerating Aging-induced Timing Violations., и . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 103-A (9): 1028-1036 (2020)