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Advanced ECC-Based FIT Rate Mitigation Technique for Automotive SoCs., , , , and . ITC, page 1-6. IEEE, (2018)Memory FIT Rate Mitigation Technique for Automotive SoCs., , , , , , , and . ITC, page 1-6. IEEE, (2019)Defect injection, Fault Modeling and Test Algorithm Generation Methodology for STT-MRAM., , , , , , and . ITC, page 1-10. IEEE, (2018)Variation-aware Fault Modeling and Test Generation for STT-MRAM., , , , and . IOLTS, page 80-83. IEEE, (2019)Generic BIST architecture for testing of content addressable memories., , , , and . IOLTS, page 86-91. IEEE Computer Society, (2011)Power Supply Noise Rejection Improvement Method in Modern VLSI Design., , , , , , , and . EWDTS, page 1-4. IEEE, (2019)Die-to-Die Testing and ECC Error Mitigation in Automotive and Industrial Safety Applications., , , , and . ITC, page 1-6. IEEE, (2020)Innovative Practices on In-System Test and Reliability of Memories., , , , , , , , , and 3 other author(s). VTS, page 1. IEEE, (2019)