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Disambiguation of "Datta, Animesh"

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A process-tolerant cache architecture for improved yield in nanoscale technologies.

, , , , and . IEEE Trans. Very Large Scale Integr. Syst., 13 (1): 27-38 (2005)

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Animesh Yadav

Animesh Das

Animesh Patcha

Animesh Bhattacharya

Animesh Garg

 

Other publications of authors with the same name

Interpreting quantum discord through quantum state merging, and . CoRR, (2010)An Ontology Based Framework for Domain Analysis of Interactive System., , and . IC3 (1), volume 94 of Communications in Computer and Information Science, page 391-402. Springer, (2010)Quantum Discord in Quantum Information Theory - From Strong Subadditivity to the Mother Protocol., and . TQC, volume 6745 of Lecture Notes in Computer Science, page 188-197. Springer, (2011)GAARP: A Power-Aware GALS Architecture for Real-Time Algorithm-Specific Tasks., , , and . IEEE Trans. Computers, 54 (6): 752-766 (2005)A low-power clock gating cell optimized for low-voltage operation in a 45-nm technology., and . ISLPED, page 159-164. ACM, (2010)Entanglement and entangling power of the dynamics in light-harvesting complexes, , , , and . (2009)cite arxiv:0912.0122 Comment: 5 pages, 4 figures.Robust Adaptive Quantum-Limited Super-Resolution Imaging., , , , and . IEEECONF, page 504-508. IEEE, (2022)Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to Enhance Yield in sub-100nm Technologies., , , , and . DATE, page 926-931. IEEE Computer Society, (2005)Profit Aware Circuit Design Under Process Variations Considering Speed Binning., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 16 (7): 806-815 (2008)Delay Modeling and Statistical Design of Pipelined Circuit Under Process Variation., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (11): 2427-2436 (2006)