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Disambiguation of "Andrieu, François"

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Hardware calibrated learning to compensate heterogeneity in analog RRAM-based Spiking Neural Networks.

, , , , , , , , , , , , and . ISCAS, page 380-383. IEEE, (2022)

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François Weirich

François Elvinger

François Guers

François Melis

François Franceschi

 

Other publications of authors with the same name

Ultra-Thin Body and Buried Oxide (UTBB) FDSOI Technology with Low Variability and Power Management Capability for 22 nm Node and Below., , , , , , , , , and . J. Low Power Electron., 8 (1): 125-132 (2012)Interplay between charge trapping and polarization switching in MFDM stacks evidenced by frequency-dependent measurements., , , , , , , , , and . ESSCIRC, page 125-128. IEEE, (2022)Impact of spacer interface charges on performance and reliability of low temperature transistors for 3D sequential integration., , , , , , , , , and 2 other author(s). IRPS, page 1-5. IEEE, (2021)Memory Window in Si: HfO2 FeRAM arrays: Performance Improvement and Extrapolation at Advanced Nodes., , , , , , , , , and . IMW, page 1-4. IEEE, (2023)1S1R sub-threshold operation in Crossbar arrays for low power BNN inference computing., , , , , , , , , and 10 other author(s). IMW, page 1-4. IEEE, (2022)Opportunities brought by sequential 3D CoolCube™ integration., , , , , , , , , and 11 other author(s). ESSDERC, page 226-229. IEEE, (2016)Guidelines for intermediate back end of line (BEOL) for 3D sequential integration., , , , , , , , , and 18 other author(s). ESSDERC, page 252-255. IEEE, (2017)Frequency modulation of conductance level in PCM device for neuromorphic applications., , , , , , , , , and . ESSCIRC, page 129-132. IEEE, (2022)CMOS VT characterization by capacitance measurements in FDSOI PIN gated diodes., , , , , and . ESSDERC, page 405-408. IEEE, (2014)Variability of planar Ultra-Thin Body and Buried oxide (UTBB) FDSOI MOSFETs., , , , , and . ICICDT, page 1-4. IEEE, (2014)