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Disambiguation of "Buccella, Pietro"

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Methodology for 3-D Substrate Network Extraction for SPICE Simulation of Parasitic Currents in Smart Power ICs.

, , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (9): 1489-1502 (2016)

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Stefano Pietro

Pietro Cortona

Pietro Moretto

Pietro Tierno

Pietro Cavallotti

 

Other publications of authors with the same name

Modeling parasitic vertical PNP in HVCMOS., , , and . MIXDES, page 486-489. IEEE, (2015)Modeling Surface Recombination with Enhanced Devices Network for Optoelectronics., , , and . NEWCAS, page 35-39. IEEE, (2018)Spice simulation of substrate minority carriers propagation with equivalent electrical circuit., , , and . MIXDES, page 347-350. IEEE, (2014)Active guard ring characterization for Smart Power ICs., , , and . MIXDES, page 305-309. IEEE, (2016)Modeling avalanche breakdown for ESD diodes in integrated circuits., , , and . DTIS, page 1-3. IEEE, (2015)Spice simulation of passive protection in smart power ICs., , , and . MIXDES, page 500-503. IEEE, (2015)SPICE modeling of light induced current in silicon with 'Generalized' lumped devices., , , and . ESSDERC, page 26-29. IEEE, (2017)Substrate-currents-aware characterization of an integrated buck DC/DC converter for floor-plan optimization., , , , and . NEWCAS, page 169-172. IEEE, (2017)Toward low-power PPG-based heart rate monitoring using a MOS-PN hybrid photosensor., , , and . NEWCAS, page 141-144. IEEE, (2017)Optimization strategy of numerical simulations applied to EPFL substrate model., , , and . MIXDES, page 334-337. IEEE, (2014)