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Methodology for 3-D Substrate Network Extraction for SPICE Simulation of Parasitic Currents in Smart Power ICs.

, , , , , , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (9): 1489-1502 (2016)

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Abdullah Kayal

Hakan Kayal

Hafez Kayali

Kamran Maher

Schiva Maher

 

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