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Offset-Canceling Single-Ended Sensing Scheme With One-Bit-Line Precharge Architecture for Resistive Nonvolatile Memory in 65-nm CMOS.

, , , , , и . IEEE Trans. Very Large Scale Integr. Syst., 27 (11): 2548-2555 (2019)

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Seong-Jung Kim

Ki-Chang Seong

Seunghyeon Seong

Hong-Jae Seong

Nak-Hyon Seong

 

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