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Disambiguation of "Misra, Prasanna Kumar"

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0.4 mW, 0.27 pJ/bit true random number generator using jitter, metastability and current starved topology.

, , , , , and . IET Circuits Devices Syst., 14 (7): 1001-1011 (2020)

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Hara Prasanna Misra

Prasanna Kumar Pathath

Manoj Misra

Sidhant Misra

Ashok Misra

 

Other publications of authors with the same name

A 2.4 GHz Low Power Low Phase-Noise Enhanced FOM VCO for RF Applications Using 180 nm CMOS Technology., , , and . Wireless Personal Communications, 101 (1): 391-403 (2018)An 8T PA Attack Resilient NVSRAM for In-Memory-Computing Applications., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 70 (9): 3567-3574 (September 2023)Design and Analysis of SRAM Cell using Negative Bit-Line Write Assist Technique and Separate Read Port for High-Speed Applications., , , , and . J. Circuits Syst. Comput., 30 (15): 2150270:1-2150270:28 (2021)Design of True Random Number Generator Using Fingerprint as an Entropy Source and Its Implementation in S-Box., , , , , and . J. Circuits Syst. Comput., 30 (15): 2150285:1-2150285:19 (2021)Design of Hexagonal Oscillator for True Random Number Generation., , , , and . ICECS 2022, page 1-4. IEEE, (2022)A 40nm Low Power High Stable SRAM Cell Using Separate Read Port and Sleep Transistor Methodology., , , and . iSES, page 1-5. IEEE, (2018)Modified Tent Map Based Design for True Random Number Generator., , , and . iSES, page 27-30. IEEE, (2018)A 60 GHz, 50 mW, 3dB Noise Figure Receiver Frontend Using UMC 40 nm CMOS technology., , , , and . iSES, page 227-231. IEEE, (2020)Design of Transceiver at 865-867 MHz Band using UMC 180 nm CMOS Technology., , , , , , , and . VDAT, page 1-5. IEEE, (2020)An Energy Efficient, Mismatch Tolerant Offset Compensating Hybrid MTJ/CMOS Magnetic Full Adder., , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (11): 4548-4552 (2022)