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Disambiguation of "Ren, Junyan"

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A 60-GHz CMOS Balanced Power Amplifier with Miniaturized Quadrature Hybrids Achieving 19.0-dBm Output Power and 24.4% Peak PAE.

, , , , and . APCCAS, page 560-564. IEEE, (2022)

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Junyan Zhu

Zhongliang Ren

Jianxin Ren

Hongming Ren

Yue Ren

 

Other publications of authors with the same name

A DLL based low-phase-noise clock multiplier with offset-tolerant PFD., , and . ASICON, page 1-4. IEEE, (2013)A sample-time error calibration technique in time-interleaved ADCs with correlation-based detection and voltage-controlled compensation., , , , and . APCCAS, page 128-131. IEEE, (2012)A background time-skew calibration technique in flash-assisted time-interleaved SAR ADCs., , , , and . ASICON, page 295-298. IEEE, (2017)A 13-bit non-binary weighted SAR ADC with bridge structure using digital calibration for capacitor weight error., , and . ASICON, page 32-35. IEEE, (2017)Automatic gain control algorithm with high-speed and double closed-loop in UWB system., , , , and . ASICON, page 1-4. IEEE, (2013)A 4.5-W, 18.5-24.5-GHz GaN Power Amplifier Employing Chebyshev Matching Technique., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 31 (2): 233-242 (February 2023)A Novel Ring Amplifier with Low Common-Mode Voltage Variation and Noise Reduction Using Floating Power Technique., , , , and . MWSCAS, page 949-953. IEEE, (2021)Additive Neural Network Based Static and Dynamic Distortion Modeling for Prior-Knowledge-Free Nyquist ADC Characterization., , , , , and . MWSCAS, page 292-296. IEEE, (2021)A 1.2 V 1.0-GS/s 8-bit Voltage-Buffer-Free Folding and interpolating ADC., , , , and . MWSCAS, page 274-277. IEEE, (2012)A cancellation technique for output-dependent delay differences in high-accuracy DACs., , , , , and . MWSCAS, page 1104-1107. IEEE, (2012)