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Disambiguation of "Omar, Hamza"

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Multicore Resource Isolation for Deterministic, Resilient and Secure Concurrent Execution of Safety-Critical Applications.

, , , and . IEEE Comput. Archit. Lett., 17 (2): 230-234 (2018)

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Hamza Hamza

Hamza Aldabbas

Hamza Agli

Hamza Chouh

Hamza Sahli

 

Other publications of authors with the same name

IRONHIDE: A Secure Multicore Architecture that Leverages Hardware Isolation Against Microarchitecture State Attacks., and . CoRR, (2019)IRONHIDE: A Secure Multicore that Efficiently Mitigates Microarchitecture State Attacks for Interactive Applications., and . HPCA, page 111-122. IEEE, (2020)GraphTuner: An Input Dependence Aware Loop Perforation Scheme for Efficient Execution of Approximated Graph Algorithms., , and . ICCD, page 201-208. IEEE Computer Society, (2017)ASM: An Adaptive Secure Multicore for Co-located Mutually Distrusting Processes., , , and . ACM Trans. Archit. Code Optim., 20 (3): 32:1-32:24 (September 2023)Review on the Geophysical and UAV-Based Methods Applied to Landslides., , , , , , and . Remote. Sens., 14 (18): 4564 (2022)Hardware Root-of-Trust implementations in Trusted Execution Environments., , , , and . IACR Cryptol. ePrint Arch., (2023)Connecting the dots: Privacy leakage via write-access patterns to the main memory., , , and . HOST, page 170. IEEE Computer Society, (2017)Declarative Resilience: A Holistic Soft-Error Resilient Multicore Architecture that Trades off Program Accuracy for Efficiency., , , , and . ACM Trans. Embed. Comput. Syst., 17 (4): 76:1-76:27 (2018)Exploiting the Tradeoff between Program Accuracy and Soft-error Resiliency Overhead for Machine Learning Workloads., , and . CoRR, (2017)OPTIMUS: A Security-Centric Dynamic Hardware Partitioning Scheme for Processors that Prevent Microarchitecture State Attacks., , and . IEEE Trans. Computers, 69 (11): 1558-1570 (2020)