Author of the publication

A High-Throughput and Compact Hardware Implementation for the Reconstruction Loop in HEVC Intra Encoding.

, , , and . IEICE Trans. Electron., 100-C (6): 643-654 (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A hardware-friendly method for rate-distortion optimization of HEVC intra coding., , , , and . VLSI-DAT, page 1-4. IEEE, (2014)A Parallel-Access Mapping Method for the Data Exchange Buffers Around DCT/IDCT in HEVC Encoders Based on Single-Port SRAMs., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 62-II (12): 1139-1143 (2015)A 88%-Peak-Efficiency 10-mV-Voltage-Ripple Dual-Mode Switched-Capacitor DC-DC Converter for Ultra-Low-Power Battery Management., , , , , , , and . ISCAS, page 1-5. IEEE, (2023)A Hardware-Oriented IME Algorithm for HEVC and Its Hardware Implementation., , , and . IEEE Trans. Circuits Syst. Video Techn., 28 (8): 2048-2057 (2018)A SRAM-saving two-stage storage strategy for the coefficients memories in HEVC encoders., , , and . ASICON, page 1-4. IEEE, (2015)A Two-Step Phenotypic Parameter Measurement Strategy for Overlapped Grapes under Different Light Conditions., , and . Sensors, 21 (13): 4532 (2021)A Compact and Configurable Long Short-Term Memory Neural Network Hardware Architecture., , , , and . ICIP, page 4168-4172. IEEE, (2018)A 3.84 GHz 32 fs RMS Jitter Over-Sampling PLL with High-Gain Cross-Switching Phase Detector., , , , , , , and . ISCAS, page 1-5. IEEE, (2023)A High-Gain and Low-Noise Mixer with Hybrid $G_m$-Boosting for 5G FR2 Applications., , , , , , and . ISCAS, page 1-5. IEEE, (2023)An Error-Surface-Based Fractional Motion Estimation Algorithm and Hardware Implementation for VVC., , , , and . ISCAS, page 1-5. IEEE, (2023)