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Другие публикации лиц с тем же именем

Hierarchical Identification of Untestable Faults in Sequential Circuits., , , и . DSD, стр. 668-671. IEEE Computer Society, (2007)A decomposition procedure for register-transfer level power management., , , и . CompSysTech, стр. 26-31. ACM, (2003)Recursion and hierarchy in digital design and prototyping: a case study., , , , и . CompSysTech, стр. 45-50. ACM, (2011)Teaching FPGA-based systems., , , и . EDUCON, стр. 460-469. IEEE, (2014)Learning Digital Test and Diagnostics via Internet., , , , , и . Int. J. Online Eng., (2007)The Rational Unified Process with the "4+1" View Model of Software Architecture - a Way for Modeling Web Applications., , и . BalticDB&IS, стр. 119-132. Institute of Cybernetics at Tallin Technical University, (2002)Integration of high-level synthesis to the courses on reconfigurable digital systems., , , и . MIPRO, стр. 166-171. IEEE, (2015)Address-based data processing over N-ary trees., , , , и . EUROCON, стр. 1790-1797. IEEE, (2013)FPGA-based time and cost effective Hamming weight comparators for binary vectors., , , и . EUROCON, стр. 1-6. IEEE, (2015)FSM decomposition with application to FPGA synthesis., , , и . CompSysTech, стр. 74. ACM, (2009)