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Disambiguation of "Dekeyser, Jean-Luc"

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Scalable Multistage Network for Multiprocessor System-on-Chip Design.

, , and . ISPAN, page 352-357. IEEE Computer Society, (2005)

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Jean-Luc Wolfender

Jean-Luc Rebière

Jean-Luc Régnier

Jean-Luc Wagner

Jean-Luc Boevé

 

Other publications of authors with the same name

Irregular Data-Parallel Objects in C++., , , and . VECPAR, volume 1215 of Lecture Notes in Computer Science, page 65-80. Springer, (1996)Analysis and Simulation of an Out-Of-Order Execution Model in Vector Multiprocessor Systems., and . Parallel Comput., 23 (13): 1963-1986 (1997)UML2 as an ADL Hierarchichal Hardware Modeling., , and . IFIP-WADL, volume 176 of IFIP, page 133-147. Springer, (2004)Hybrid system level power consumption estimation for FPGA-based MPSoC., , , , and . ICCD, page 239-246. IEEE Computer Society, (2011)Real-time systems for multiprocessor architectures., , , and . IPDPS, IEEE, (2006)Multiple Abstraction Views of FPGA to Map Parallel Applications., , and . ReCoSoC, page 90-97. Univ. Montpellier II, (2007)Model Transformations for the Compilation of Multi-processor Systems-on-Chip., , and . GTTSE, volume 5235 of Lecture Notes in Computer Science, page 459-473. Springer, (2007)An efficient power estimation methodology for complex RISC processor-based platforms., , , , and . ACM Great Lakes Symposium on VLSI, page 239-244. ACM, (2012)Communication-centric design for FMC based I/O system., , , and . ReCoSoC, page 1-8. IEEE, (2014)Dynamic reconfiguration of modular I/O IP cores for avionic applications., , , , and . ReConFig, page 1-6. IEEE, (2012)