Author of the publication

s Iterative Concatenated-BCH Decoder in 65-nm CMOS for NAND Flash Memory.

Y. Lee, H. Yoo, J. Jung, J. Jo, and I. Park. IEEE J. Solid State Circuits, 48 (10): 2531-2540 (2013)

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Eva Jüngel

Präklinische Studien zur Behandlung des Nierenzellkarzinoms durch den Histondeacetylase-Inhibitor Valproat und Interferon-alphaE. Jüngel. Uni Frankfurt Main, (2009)

Yvonne Jung

Susan Jung

Matthias Jung

Juliane Jung

Other publications of authors with the same name

A 2.4pJ/bit, 6.37Gb/s SPC-enhanced BC-BCH decoder in 65nm CMOS for NAND flash storage systems.J. Jung, I. Park, and Y. Lee. ASP-DAC, page 329-330. IEEE, (2018)Energy-Scalable 4KB LDPC Decoding Architecture for NAND-Flash-Based Storage Systems.Y. Lee, J. Jung, and I. Park. IEICE Trans. Electron., 99-C (2): 293-301 (2016)Unidirectional ring ethernet for low-complexity in-vehicle control network.I. Yoo, M. Hwang, J. Jung, S. Kim, and I. Park. ICIT, page 1951-1955. IEEE, (2015)Multi-Bit Flipping Decoding of LDPC Codes for NAND Storage Systems.J. Jung, and I. Park. IEEE Communications Letters, 21 (5): 979-982 (2017)Energy-Efficient Symmetric BC-BCH Decoder Architecture for Mobile Storages.S. Hwang, S. Moon, J. Jung, D. Kim, I. Park, J. Ha, and Y. Lee. IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (11): 4462-4475 (2019)Area-Efficient Approach for Generating Quantized Gaussian Noise.J. Choi, J. Jung, and I. Park. IEEE Trans. Circuits Syst. I Regul. Pap., 63-I (7): 1005-1013 (2016)Low-Complexity Tree Architecture for Finding the First Two Minima.Y. Lee, B. Kim, J. Jung, and I. Park. IEEE Trans. Circuits Syst. II Express Briefs, 62-II (1): 61-64 (2015)Area-Efficient Multimode Encoding Architecture for Long BCH Codes.H. Yoo, J. Jung, J. Jo, and I. Park. IEEE Trans. Circuits Syst. II Express Briefs, 60-II (12): 872-876 (2013)A 2.74-pJ/bit, 17.7-Gb/s Iterative Concatenated-BCH Decoder in 65-nm CMOS for NAND Flash Memory.Y. Lee, H. Yoo, J. Jung, J. Jo, and I. Park. IEEE J. Solid State Circuits, 48 (10): 2531-2540 (2013)Efficient Parallel Architecture for Linear Feedback Shift Registers.J. Jung, H. Yoo, Y. Lee, and I. Park. IEEE Trans. Circuits Syst. II Express Briefs, 62-II (11): 1068-1072 (2015)

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Disambiguation of "Jung, Jaehwan"

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A 2.74-pJ/bit, 17.7-Gb/s Iterative Concatenated-BCH Decoder in 65-nm CMOS for NAND Flash Memory.

Please choose a person to relate this publication to

Eva Jüngel

Yvonne Jung

Susan Jung

Matthias Jung

Juliane Jung

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Jung, Jaehwan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 2.74-pJ/bit, 17.7-Gb/s Iterative Concatenated-BCH Decoder in 65-nm CMOS for NAND Flash Memory.

Please choose a person to relate this publication to

Eva Jüngel

Yvonne Jung

Susan Jung

Matthias Jung

Juliane Jung

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 2.74-pJ/bit, 17.7-Gb/s Iterative Concatenated-BCH Decoder in 65-nm CMOS for NAND Flash Memory.