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Disambiguation of "Becker, Jürgen"

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Data Movement Reduction for DNN Accelerators: Enabling Dynamic Quantization Through an eFPGA.

, , , , and . ISVLSI, page 371-372. IEEE, (2022)

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Jürgen Becker

Jürgen Becker

Jürgen Becker

Jürgen Becker

Jürgen Becker

 

Other publications of authors with the same name

A WCET-aware parallel programming model for predictability enhanced multi-core architectures., , , , , and . DATE, page 943-948. IEEE, (2018)Reliable Fail-Operational Automotive E/E-Architectures by Dynamic Redundancy and Reconfiguration., , , and . SoCC, page 203-208. IEEE, (2019)A combined lattice BGK/level set method for immiscible two-phase flows., , , , and . Comput. Math. Appl., 58 (5): 950-964 (2009)HLS-Based Performance and Resource Optimization of Cryptographic Modules., , , and . ISPA/IUCC/BDCloud/SocialCom/SustainCom, page 1009-1016. IEEE, (2018)V-FPGAs: Increasing Performance with Manual Placement, Timing Extraction and Extended Timing Modeling., , and . J. Signal Process. Syst., 94 (9): 865-882 (2022)An Interconnect Strategy for a Heterogeneous, Reconfigurable SoC., , , , , , , , , and 2 other author(s). IEEE Des. Test Comput., 25 (5): 442-451 (2008)An Adaptive Lockstep Architecture for Mixed-Criticality Systems., , , and . ISVLSI, page 7-12. IEEE, (2021)Embedded Face Recognition for Personalized Services in the Assistive Robotics., , , , , , and . PKDD/ECML Workshops (1), volume 1524 of Communications in Computer and Information Science, page 339-350. Springer, (2021)ReLoDAQ: Resource-Efficient, Low-Overhead 200 Gbits-1 Data Acquisition System for 6G Prototyping., , , , and . FCCM, page 209. IEEE, (2023)Configurable systems-on-chip: commercial and academic approaches.. ICECS, page 809-812. IEEE, (2002)