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Disambiguation of "Yoon, Sei-Seung"

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Numerical Estimation of Yield in Sub-100-nm SRAM Design Using Monte Carlo Simulation.

, , , and . IEEE Trans. Circuits Syst. II Express Briefs, 55-II (9): 907-911 (2008)

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Jung-Hun Seung

Sei Morimoto

Alain Sei

Ho-Byung Yoon

Chang-Ju Yoon

 

Other publications of authors with the same name

A robust single supply voltage SRAM read assist technique using selective precharge., , and . ESSCIRC, page 234-237. IEEE, (2008)Race-Free Mixed Serial-Parallel Comparison for Low Power Content Addressable Memory., and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 91-A (3): 895-898 (2008)A methodology for statistical estimation of read access yield in SRAMs., , , , , and . DAC, page 205-210. ACM, (2008)Trading-off on-die observability for cache minimum supply voltage reduction in system-on-chip (SoC) processors., , , , , , , and . ITC, page 1. IEEE Computer Society, (2014)A 14nm 128Mb Embedded MRAM Macro achieved the Best Figure-Of-Merit with 80MHz Read operation and 18.1Mb/mm² implementation at 0.64V., , , , , , , , , and 2 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)Design Methodologies for STT-MRAM (Spin-Torque Transfer Magnetic Random Access Memory) Sensing Circuits., , , , and . IEICE Trans. Electron., 93-C (6): 912-921 (2010)Numerical Estimation of Yield in Sub-100-nm SRAM Design Using Monte Carlo Simulation., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 55-II (9): 907-911 (2008)Exploiting error-correcting codes for cache minimum supply voltage reduction while maintaining coverage for radiation-induced soft errors., , , , , , , and . CICC, page 1-4. IEEE, (2014)Reducing SRAM Power Using Fine-Grained Wordline Pulsewidth Control., , and . IEEE Trans. Very Large Scale Integr. Syst., 18 (3): 356-364 (2010)Characterization of SRAM sense amplifier input offset for yield prediction in 28nm CMOS., , , , , , , and . CICC, page 1-4. IEEE, (2011)