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A Graph Based Processor Model for Retargetable Code Generation.

, , , , and . ED&TC, page 102-107. IEEE Computer Society, (1996)

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Performance Through Hierarchy in Static Timing Verification., , and . IFIP Congress (1), volume A-12 of IFIP Transactions, page 703-709. North-Holland, (1992)Static Timing Analysis of Dynamically Sensitizable Paths., , and . DAC, page 568-573. ACM Press, (1989)Loop Optimization in Register-Transfer Scheduling for DSP-Systems., , and . DAC, page 826-831. ACM Press, (1989)Nonlinear transformations for high level regular array ASIC synthesis., , and . VLSI Signal Processing, 4 (4): 259-268 (1992)Reasoning About a Class of Linear Systems of Equations in HOL., , and . TPHOLs, volume 859 of Lecture Notes in Computer Science, page 33-48. Springer, (1994)Efficient CAD tools for the coefficient optimisation of arbitrary integrated digital filters., , and . ICASSP, page 602-605. IEEE, (1984)OFDM vs. single-carrier: a multi-antenna comparison., , , and . ICASSP (4), page 753-756. IEEE, (2004)On the impact of multi-antenna RF transceivers' amplitude and phase mismatches on transmit MRC., , , , , and . ICASSP (4), page 893-896. IEEE, (2005)Advanced Data Layout Optimization for Multimedia Applications., , and . IPDPS Workshops, volume 1800 of Lecture Notes in Computer Science, page 186-193. Springer, (2000)Design technology research for the nineties: more of the same?. EURO-DAC, page 592-596. IEEE Computer Society Press, (1992)