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Ground-Bouncing-Noise-Aware Combinational MTCMOS Circuits.

, and . IEEE Trans. Circuits Syst. I Regul. Pap., 57-I (8): 2053-2065 (2010)

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Tri-mode Operation for Noise Reduction and Data Preservation in Low-Leakage Multi-Threshold CMOS Circuits., and . VLSI-SoC (Selected Papers), volume 373 of IFIP Advances in Information and Communication Technology, page 258-290. Springer, (2010)Ground-Bouncing-Noise-Aware Combinational MTCMOS Circuits., and . IEEE Trans. Circuits Syst. I Regul. Pap., 57-I (8): 2053-2065 (2010)A novel 6T SRAM cell with asymmetrically gate underlap engineered FinFETs for enhanced read data stability and write ability., , and . ISQED, page 353-358. IEEE, (2013)A -80 dB PSRR 4.99 ​ppm/°C TC bandgap reference with nonlinear compensation., , , , , , , , , and . Microelectron. J., (2020)C3MLS: An Ultra-Wide-Range Energy-Efficient Level Shifter With CCLS/CMLS Hybrid Structure., and . IEEE J. Solid State Circuits, 58 (10): 2685-2695 (October 2023)Efficient Zero-Activation-Skipping for On-Chip Low-Energy CNN Acceleration., , and . AICAS, page 1-4. IEEE, (2021)Standard Cell Optimization for Ultra-Low-Voltage Digital Circuits., and . ICICDT, page 1-4. IEEE, (2019)An Energy-Efficient Low-Latency 3D-CNN Accelerator Leveraging Temporal Locality, Full Zero-Skipping, and Hierarchical Load Balance., , , , and . DAC, page 241-246. IEEE, (2021)A Compact Low-Power Data Retention Flip-Flop with Easy-Sleep Mode., and . ISCAS, page 1-5. IEEE, (2020)Segmented Reconfigurable Cyclic Shifter for QC-LDPC Decoder., , , , , and . ISCAS, page 1-5. IEEE, (2021)