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Disambiguation of "Kakoee, Mohammad Reza"

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Evaluation of GALS Methods in Scaled CMOS Technology: Moonrake Chip Experience.

, , , , , , , , and . Int. J. Embed. Real Time Commun. Syst., 3 (4): 1-18 (2012)

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Mohammad Reza Mohammad Khorasani

Mohammad Reza Tarazi

Mohammad-Reza Veschgini

Mohammad Reza Sarvati

Mohammad Reza Ahmadi

 

Other publications of authors with the same name

Fine-Grained Power and Body-Bias Control for Near-Threshold Deep Sub-Micron CMOS Circuits., and . IEEE J. Emerg. Sel. Topics Circuits Syst., 1 (2): 131-140 (2011)At-Speed Distributed Functional Testing to Detect Logic and Delay Faults in NoCs., , and . IEEE Trans. Computers, 63 (3): 703-717 (2014)De Bruijn Graph as a Low Latency Scalable Architecture for Energy Efficient Massive NoCs., , , and . DATE, page 1370-1373. ACM, (2008)Generating RTL Synthesizable Code from Behavioral Testbenches for Hardware-Accelerated Verification., , and . DSD, page 714-720. IEEE Computer Society, (2008)A floorplan-aware interactive tool flow for NoC design and synthesis., , , , , and . SoCC, page 379-382. IEEE, (2009)Robust Near-Threshold Design With Fine-Grained Performance Tunability., and . IEEE Trans. Circuits Syst. I Regul. Pap., 59-I (8): 1815-1825 (2012)A shared-FPU architecture for ultra-low power MPSoCs., , and . Conf. Computing Frontiers, page 3:1-3:8. ACM, (2013)A distributed and topology-agnostic approach for on-line NoC testing., , and . NOCS, page 113-120. ACM/IEEE Computer Society, (2011)Using Integer Equations for High Level Formal Verification Property Checking., and . ISQED, page 69-74. IEEE Computer Society, (2003)Variation-Tolerant Architecture for Ultra Low Power Shared-L1 Processor Clusters., , and . IEEE Trans. Circuits Syst. II Express Briefs, 59-II (12): 927-931 (2012)