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Design Issues and Considerations for Low-Cost 3-D TSV IC Technology., , , , , , , , , and 27 other author(s). IEEE J. Solid State Circuits, 46 (1): 293-307 (2011)Design issues and considerations for low-cost 3D TSV IC technology., , , , , , , , , and 24 other author(s). ISSCC, page 148-149. IEEE, (2010)Verifying electrical/thermal/thermo-mechanical behavior of a 3D stack - Challenges and solutions., , , , , , , , , and 8 other author(s). CICC, page 1-4. IEEE, (2010)High resolution flash time-to-digital converter with sub-picosecond measurement capabilities., , , and . SoC, page 1-4. IEEE, (2008)In-tier diagnosis of power domains in 3D TSV ICs., , , , , , , , , and 1 other author(s). 3DIC, page 1-6. IEEE, (2011)3D integration: Circuit design, test, and reliability challenges., , , , , , , , and . IOLTS, page 217. IEEE Computer Society, (2010)A High Resolution Flash Time-to-Digital Converter Taking Into Account Process Variability., , , and . ASYNC, page 163-174. IEEE Computer Society, (2007)FPGA Implementation of an Asynchronous Processor with Both Online and Offline Testing Capabilities., , , and . ASYNC, page 128-137. IEEE Computer Society, (2008)NoC Communication Strategies Using Time-to-Digital Conversion., , , , and . NOCS, page 65-74. IEEE Computer Society, (2007)