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A prototyping system for verification and evaluation in hardware-software cosynthesis.

, , , , and . RSP, page 54-61. IEEE Computer Society, (1995)

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Safety, Efficiency and Autonomy - Mastering Conflicting Trends in Embedded Systems Design.. DIPES/BICC, volume 329 of IFIP Advances in Information and Communication Technology, page 5-6. Springer, (2010)From Model to Requirements: Pattern-Based Analysis in Distributed Development of Embedded Systems., , and . IESS, volume 184 of IFIP, page 35-44. Springer, (2005)Failure analysis of a network-on-chip for real-time mixed-critical systems., , , , and . DATE, page 1-4. European Design and Automation Association, (2014)Zero-time communication for automotive multi-core systems under SPP scheduling., , and . ETFA, page 1-9. IEEE, (2016)Cross-layer dependency analysis with timing dependence graphs., and . DAC, page 99:1-99:6. ACM, (2018)An approach for physical topology exploration in wired bus networks., , and . ISCAS, page 205-208. IEEE, (2015)Modelling and designing reliable on-chip-communication devices in MPSoCs with real-time requirements., and . ETFA, page 1465-1472. IEEE, (2008)A system-level FPGA design methodology for video applications with weakly-programmable hardware components., , and . J. Real-Time Image Processing, 13 (2): 291-309 (2017)Weakly-hard Real-time Guarantees for Earliest Deadline First Scheduling of Independent Tasks., , and . ACM Trans. Embed. Comput. Syst., 18 (6): 121:1-121:25 (2020)Response-Time Analysis for Task Chains with Complex Precedence and Blocking Relations., and . ACM Trans. Embed. Comput. Syst., 16 (5s): 172:1-172:19 (2017)