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Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration.

W. Tang, S. Cho, T. Hoang, J. Botimer, W. Zhu, C. Chang, C. Lu, J. Zhu, Y. Tao, T. Wei, N. Motwani, M. Yalamanchi, R. Yarlagadda, S. Kale, M. Flanigan, A. Chan, T. Tran, S. Shumarayev, and Z. Zhang. IEEE J. Solid State Circuits, 59 (4): 1235-1245 (April 2024)

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Junkang Feng

Yiping Zhu

Yongming Zhu

Jiani Zhu

Junjiang Zhu

Other publications of authors with the same name

VOTA: A Heterogeneous Multicore Visual Object Tracking Accelerator Using Correlation Filters.J. Zhu, W. Tang, C. Lee, H. Ye, E. McCreath, and Z. Zhang. IEEE J. Solid State Circuits, 57 (11): 3490-3502 (2022)An 8-bit 20.7 TOPS/W Multi-Level Cell ReRAM-based Compute Engine.J. Correll, L. Jie, S. Song, S. Lee, J. Zhu, W. Tang, L. Wormald, J. Erhardt, N. Breil, R. Quon and 6 other author(s). VLSI Technology and Circuits, page 264-265. IEEE, (2022)VOTA: A 2.45TFLOPS/W Heterogeneous Multi-Core Visual Object Tracking Accelerator Based on Correlation Filters.J. Zhu, W. Tang, C. Lee, H. Ye, E. McCreath, and Z. Zhang. VLSI Circuits, page 1-2. IEEE, (2021)Arvon: A Heterogeneous SiP Integrating a 14nm FPGA and Two 22nm 1.8TFLOPS/W DSPs with 1.7Tbps/mm2 AIB 2.0 Interface to Provide Versatile Workload Acceleration.W. Tang, S. Cho, T. Hoang, J. Botimer, W. Zhu, C. Chang, C. Lu, J. Zhu, Y. Tao, T. Wei and 9 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)eNODE: Energy-Efficient and Low-Latency Edge Inference and Training of Neural ODEs.J. Zhu, Y. Tao, and Z. Zhang. HPCA, page 802-813. IEEE, (2023)Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration.W. Tang, S. Cho, T. Hoang, J. Botimer, W. Zhu, C. Chang, C. Lu, J. Zhu, Y. Tao, T. Wei and 9 other author(s). IEEE J. Solid State Circuits, 59 (4): 1235-1245 (April 2024)Contextual Similarity Regularized Metric Learning for person re-identification.J. Wang, J. Zhu, Z. Wang, C. Gao, N. Sang, and R. Huang. ICPR, page 2048-2053. IEEE, (2016)

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Disambiguation of "Zhu, Junkang"

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Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration.

Please choose a person to relate this publication to

Junkang Feng

Yiping Zhu

Yongming Zhu

Jiani Zhu

Junjiang Zhu

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Zhu, Junkang"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration.

Please choose a person to relate this publication to

Junkang Feng

Yiping Zhu

Yongming Zhu

Jiani Zhu

Junjiang Zhu

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

Arvon: A Heterogeneous System-in-Package Integrating FPGA and DSP Chiplets for Versatile Workload Acceleration.