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Disambiguation of "Chatha, Karam S."

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Automated Techniques for Synthesis of Application-Specific Network-on-Chip Architectures.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (8): 1425-1438 (2008)

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Karam Farag

Karam Ashmawy

Margot Karam

Karam Khella

Susanne Karam

 

Other publications of authors with the same name

A technique for low energy mapping and routing in network-on-chip architectures., and . ISLPED, page 387-392. ACM, (2005)ILP and heuristic techniques for system-level design on network processor architectures., , , and . ACM Trans. Design Autom. Electr. Syst., 12 (4): 48 (2007)A performance model and code overlay generator for scratchpad enhanced embedded processors., , , , and . CODES+ISSS, page 287-296. ACM, (2010)Throughput optimal task allocation under thermal constraints for multi-core processors., , , and . DAC, page 776-781. ACM, (2009)Scheduling of synchronous data flow models onto scratchpad memory-based embedded processors., and . ACM Trans. Embed. Comput. Syst., 13 (1s): 30:1-30:25 (2013)ISIS: A Genetic Algorithm Based Technique for Custom On-Chip Interconnection Network Synthesis., and . VLSI Design, page 623-628. IEEE Computer Society, (2005)A Technique for Energy versus Quality of Service Trade-Off for MPEG-2 Decoder., , and . ISVLSI, page 313-316. IEEE Computer Society, (2004)A Methodology for Layout Aware Design and Optimization of Custom Network-on-Chip Architectures., and . ISQED, page 352-357. IEEE Computer Society, (2006)Design of an Automatic Target Recognition algorithm on the IBM Cell Broadband Engine., and . ASAP, page 21-28. IEEE Computer Society, (2010)An Iterative Algorithm for Hardware-Software Partitioning, Hardware Design Space Exploration and Scheduling., and . Des. Autom. Embed. Syst., 5 (3-4): 281-293 (2000)