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Disambiguation of "Srinivasan, Krishnan"

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Automated Techniques for Synthesis of Application-Specific Network-on-Chip Architectures.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (8): 1425-1438 (2008)

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Krishnan Sircar

Ajay Krishnan

Venkata Krishnan

Ajay Krishnan

R Srinivasan

 

Other publications of authors with the same name

Layout aware design of mesh based NoC architectures., and . CODES+ISSS, page 136-141. ACM, (2006)SAGA: synthesis technique for guaranteed throughput NoC architectures., and . ASP-DAC, page 489-494. ACM Press, (2005)Recovery RL: Safe Reinforcement Learning With Learned Recovery Zones., , , , , , , , , and . IEEE Robotics Autom. Lett., 6 (3): 4915-4922 (2021)A Robot Cluster for Reproducible Research in Dexterous Manipulation., , , , , , , , , and 19 other author(s). CoRR, (2021)A low complexity heuristic for design of custom network-on-chip architectures., and . DATE, page 130-135. European Design and Automation Association, Leuven, Belgium, (2006)Making Sense of Vision and Touch: Self-Supervised Learning of Multimodal Representations for Contact-Rich Tasks., , , , , , , and . ICRA, page 8943-8950. IEEE, (2019)An automated technique for topology and route generation of application specific on-chip interconnection networks., , and . ICCAD, page 231-237. IEEE Computer Society, (2005)Integer linear programming and heuristic techniques for system-level low power scheduling on multiprocessor architectures under throughput constraints., and . Integr., 40 (3): 326-354 (2007)Controlling Assistive Robots with Learned Latent Actions., , , , and . CoRR, (2019)Automated Techniques for Synthesis of Application-Specific Network-on-Chip Architectures., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (8): 1425-1438 (2008)