( en | de | ru )

 

Disambiguation of "Yin, Wenbo"

Author of the publication

copydeleteadd this publication to your clipboard
FDRA: A Framework for a Dynamically Reconfigurable Accelerator Supporting Multi-Level Parallelism.

, , , , , , and . ACM Trans. Reconfigurable Technol. Syst., 17 (1): 4:1-4:26 (March 2024)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Wenbo Ma

Renfu Yin

Lu Yin

Li Yin

Zhihong Yin

 

Other publications of authors with the same name

Memory efficient and high performance key-value store on FPGA using Cuckoo hashing., , , and . FPL, page 1-4. IEEE, (2016)HETA: A Heterogeneous Temporal CGRA Modeling and Design Space Exploration via Bayesian Optimization., , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 32 (3): 505-518 (March 2024)Empowering Female Entrepreneurs at the 2018 WIE ILC Start-Up Pitch Competition Society News., and . IEEE Consumer Electronics Magazine, 8 (1): 7-8 (2019)High Throughput and Low Latency Multi-Version Management Key-Value Storage Accelerator., , , , and . FPT, page 290-291. IEEE, (2020)Knowledge Enhanced Pre-trained Language Model for Product Summarization., , , , , , and . NLPCC (2), volume 13552 of Lecture Notes in Computer Science, page 263-273. Springer, (2022)CPIC at SemEval-2023 Task 7: GPT2-Based Model for Multi-evidence Natural Language Inference for Clinical Trial Data., , , , and . SemEval@ACL, page 397-401. Association for Computational Linguistics, (2023)A High-performance Open-channel Open-way NAND Flash Controller Architecture., , and . FPL, page 91-98. IEEE, (2021)No zero padded sparse matrix-vector multiplication on FPGAs., , , and . FPT, page 290-291. IEEE, (2014)FULL-KV: Flexible and Ultra-Low-Latency In-Memory Key-Value Store System Design on CPU-FPGA., , , , , , , , , and 1 other author(s). IEEE Trans. Parallel Distributed Syst., 31 (8): 1828-1444 (2020)A Dynamic Partial Reconfigurable CGRA Framework for Multi-Kernel Applications., , , , , and . ICFPT, page 298-299. IEEE, (2023)