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Memory Effects in Multi-terminal Solid State Devices and Their Applications.

, , , and . Handbook of Memristor Networks, Springer, (2019)

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Memristive devices fabricated with silicon nanowire schottky barrier transistors., , , , and . ISCAS, page 9-12. IEEE, (2010)Co-Design of ReRAM Passive Crossbar Arrays Integrated in 180 nm CMOS Technology., , , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 6 (3): 339-351 (2016)Multiterminal Memristive Nanowire Devices for Logic and Memory Applications: A Review., , and . Proc. IEEE, 100 (6): 2008-2020 (2012)Alternative design methodologies for the next generation logic switch., , , and . ICCAD, page 231-234. IEEE Computer Society, (2011)Towards structured ASICs using polarity-tunable Si nanowire transistors., , , , , , and . DAC, page 123:1-123:4. ACM, (2013)Hybrid InP-SiN microring-resonator based tunable laser with high output power and narrow linewidth for high capacity coherent systems., , , , , , , , , and 7 other author(s). OFC, page 1-3. IEEE, (2022)A ultra-low-power FPGA based on monolithically integrated RRAMs., , , , , , , and . DATE, page 1203-1208. ACM, (2015)A ReRAM-based non-volatile flip-flop with sub-VT read and CMOS voltage-compatible write., , , , , and . NEWCAS, page 1-4. IEEE, (2013)Design aspects of carry lookahead adders with vertically-stacked nanowire transistors., , , and . ISCAS, page 1715-1718. IEEE, (2010)Memory Effects in Multi-terminal Solid State Devices and Their Applications., , , and . Handbook of Memristor Networks, Springer, (2019)