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Disambiguation of "Morioka, Sumio"

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A Compact Rijndael Hardware Architecture with S-Box Optimization.

, , , and . ASIACRYPT, volume 2248 of Lecture Notes in Computer Science, page 239-254. Springer, (2001)

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Sumio Takeda

Nobuyuki Morioka

 

Other publications of authors with the same name

Small and High-Speed Hardware Architectures for the 3GPP Standard Cipher KASUMI., and . ISC, volume 2433 of Lecture Notes in Computer Science, page 48-62. Springer, (2002)A Compact Rijndael Hardware Architecture with S-Box Optimization., , , and . ASIACRYPT, volume 2248 of Lecture Notes in Computer Science, page 239-254. Springer, (2001)Flexible architecture optimization and ASIC implementation of group signature algorithm using a customized HLS methodology., , , , and . HOST, page 57-62. IEEE Computer Society, (2011)Efficient Error Correction Code Configurations for Quasi-Nonvolatile Data Retention by DRAMs., , and . DFT, page 201-. IEEE Computer Society, (2000)A High Throughput/Gate AES Hardware Architecture by Compressing Encryption and Decryption Datapaths - Toward Efficient CBC-Mode Implementation., , , and . CHES, volume 9813 of Lecture Notes in Computer Science, page 538-558. Springer, (2016)Fault-Tolerant Refresh Power Reduction of DRAMs for Quasi-Nonvolatile Data Retention., , , and . DFT, page 311-318. IEEE Computer Society, (1999)A 10-Gbps full-AES crypto design with a twisted BDD S-Box architecture., and . IEEE Trans. Very Large Scale Integr. Syst., 12 (7): 686-691 (2004)Hierarchical Formal Verification Combining Algebraic Transformation with PPRM Expansion and Its Application to Masked Cryptographic Processors., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 100-A (7): 1396-1408 (2017)Secure Communication via GNSS-based Key Synchronization., , and . WIPHAL, volume 3434 of CEUR Workshop Proceedings, CEUR-WS.org, (2023)An Optimized S-Box Circuit Architecture for Low Power AES Design., and . CHES, volume 2523 of Lecture Notes in Computer Science, page 172-186. Springer, (2002)