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Post-Silicon Validation of the IBM POWER9 Processor., , , , , and . DATE, page 999-1002. IEEE, (2020)Threadmill: a post-silicon exerciser for multi-threaded processors., , , , , , and . DAC, page 860-865. ACM, (2011)Post Silicon Validation of the MMU., , , , , , , , , and 1 other author(s). DATE, page 212-217. IEEE, (2021)Unveiling difficult bugs in address translation caching arrays for effective post-silicon validation., , , , , , and . ICCD, page 544-551. IEEE Computer Society, (2016)Random Test Generation of Application Programming Interfaces., , and . CoRR, (2022)Comparative study of test generation methods for simulation accelerators., , , , , , , , and . DATE, page 321-324. ACM, (2015)Test Generation Methods for Utilization Improvement of Hardware-Accelerated Simulation Platforms., , , , , , , , and . IEEE Des. Test, 34 (1): 65-76 (2017)Effective post-silicon failure localization using dynamic program slicing., , , , and . DATE, page 1-6. European Design and Automation Association, (2014)Probabilistic bug-masking analysis for post-silicon tests in microprocessor verification., , , , , , and . DAC, page 24:1-24:6. ACM, (2016)Improving Post-silicon Validation Efficiency by Using Pre-generated Data., , , , , and . Haifa Verification Conference, volume 8244 of Lecture Notes in Computer Science, page 166-181. Springer, (2013)