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Disambiguation of "Sugawara, Takeshi"

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High-Performance Concurrent Error Detection Scheme for AES Hardware.

, , , and . CHES, volume 5154 of Lecture Notes in Computer Science, page 100-112. Springer, (2008)

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Takeshi Morita

Takeshi Morita

Takeshi Imamura

Takeshi Omori

Takeshi Yasui

 

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Hardware Performance Evaluation of Authenticated Encryption SAEAES with Threshold Implementation.. Cryptogr., 4 (3): 23 (2020)On measurable side-channel leaks inside ASIC design primitives., , , , and . J. Cryptogr. Eng., 4 (1): 59-73 (2014)Reversing stealthy dopant-level circuits., , , , , , and . J. Cryptogr. Eng., 5 (2): 85-94 (2015)Unified Coprocessor Architecture for Secure Key Storage and Challenge-Response Authentication., , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 97-A (1): 264-274 (2014)A High-Resolution Phase-Based Waveform Matching and Its Application to Side-Channel Attacks., , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 91-A (1): 193-202 (2008)Asymmetric Leakage from Multiplier and Collision-Based Single-Shot Side-Channel Attack., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 99-A (7): 1323-1333 (2016)Side-channel leakage from sensor-based countermeasures against fault injection attack., , , , , and . Microelectron. J., (2019)AES-LBBB: AES Mode for Lightweight and BBB-Secure Authenticated Encryption., , and . IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021 (3): 298-333 (2021)Lightweight Authenticated Encryption Mode of Operation for Tweakable Block Ciphers., and . IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020 (1): 66-94 (2020)MMM: Authenticated Encryption with Minimum Secret State for Masking., , and . IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023 (4): 80-109 (2023)