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An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS.

Y. Liu, J. van den Heuvel, T. Kuramochi, B. Busze, P. Mateman, V. Chillara, B. Wang, R. Staszewski, and K. Philips. IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (5): 1094-1105 (2017)

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Sebastian Philips

Heinz Philips

Rosa Philips

Josef Philips

Richard Philips

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Design and built-in characterization of digital-to-time converters for ultra-low power ADPLLs.P. Chen, X. Huang, Y. Liu, M. Ding, C. Zhou, A. Ba, K. Philips, H. de Groot, and R. Staszewski. ESSCIRC, page 283-286. IEEE, (2015)A 1.6mW 0.5GHz open-loop VGA with fast startup and offset calibration for UWB radios.P. Harpe, C. Zhou, K. Philips, and H. de Groot. ESSCIRC, page 103-106. IEEE, (2011)An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS.Y. Liu, J. van den Heuvel, T. Kuramochi, B. Busze, P. Mateman, V. Chillara, B. Wang, R. Staszewski, and K. Philips. IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (5): 1094-1105 (2017)9.8 An 860μW 2.1-to-2.7GHz all-digital PLL-based frequency modulator with a DTC-assisted snapshot TDC for WPAN (Bluetooth Smart and ZigBee) applications.V. Chillara, Y. Liu, B. Wang, A. Ba, M. Vidojkovic, K. Philips, H. de Groot, and R. Staszewski. ISSCC, page 172-173. IEEE, (2014)24.7 A 673µW 1.8-to-2.5GHz dividerless fractional-N digital PLL with an inherent frequency-capture capability and a phase-dithering spur mitigation for IoT applications.Y. He, Y. Liu, T. Kuramochi, J. van den Heuvel, B. Busze, N. Markulic, C. Bachmann, and K. Philips. ISSCC, page 420-421. IEEE, (2017)A 8mW-RX/113mW-TX, Sub-GHz SoC with time-dithered PA ramping for LPWAN applications.H. Gul, J. Romme, P. Mateman, J. Dijkhuis, X. Huang, C. Zhou, B. Busze, G. van Schaik, E. Bechthum, M. Ding and 5 other author(s). ESSCIRC, page 376-379. IEEE, (2017)A circuit-design-driven tool with a hybrid automation approach for SAR ADCs in IoT.M. Ding, G. Chen, P. Harpe, B. Busze, Y. Liu, C. Bachmann, K. Philips, and A. van Roermund. DATE, page 672-675. IEEE, (2018)A high-band IR-UWB chipset for real-time duty-cycled communication and localization systems.X. Wang, K. Philips, C. Zhou, B. Busze, H. Pflug, A. Young, J. Romme, P. Harpe, S. Bagga, S. D'Amico and 3 other author(s). A-SSCC, page 381-384. IEEE, (2011)10ns Start-up techniques for a duty cycled Impulse Radio receiver.C. Zhou, P. Harpe, X. Wang, K. Philips, and H. de Groot. ESSCIRC, page 426-429. IEEE, (2012)Radio channel characterization for 400 MHz implanted devices.H. Pflug, H. Visser, N. Kiyani, G. Dolmans, K. Philips, K. Kanda, M. Hamaminato, and S. Masui. WCNC, page 293-298. IEEE, (2014)

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Disambiguation of "Philips, Kathleen"

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An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS.

Please choose a person to relate this publication to

Sebastian Philips

Heinz Philips

Rosa Philips

Josef Philips

Richard Philips

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Philips, Kathleen"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS.

Please choose a person to relate this publication to

Sebastian Philips

Heinz Philips

Rosa Philips

Josef Philips

Richard Philips

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS.