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Disambiguation of "Bayoumi, Magdy A."

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Comparing performance metrics of a parallel ECC architecture vs. input data patterns and granularity.

, , , and . ICEAC, page 1-5. IEEE, (2012)

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Tarek Magdy

AbdElMoniem Bayoumi

Magdy Shallan

Magdy Mahdy

Magdy Kaml

 

Other publications of authors with the same name

Multiple voltage-based scheduling methodology for low power in the high level synthesis., and . ISCAS (1), page 371-374. IEEE, (1999)Design and Realization of Analog Phi-Function for LDPC Decoder., , , , and . ISCAS, page 1661-1664. IEEE, (2007)De-Cache: A novel caching scheme for large-scale NoC based multiprocessor systems-on-chips., and . SoCC, page 191-196. IEEE, (2011)Algorithms for High Speed Multi-Dimensional Arithmetic and DSP Systolic Arrays., and . ICPP (1), page 367-374. Pennsylvania State University Press, (1988)Formal Synthesis of a Parallel Architectures from Recursive Equations., and . ICPP (1), page 145-148. Pennsylvania State University Press, (1990)A low power adaptive transmitter architecture for low band UWB applications., and . ISCAS, IEEE, (2006)Performance evaluation of 1-bit CMOS adder cells., and . ISCAS (1), page 27-30. IEEE, (1999)Noise-constrained interconnect optimization for nanometer technologies., , and . ISCAS (5), page 481-484. IEEE, (2003)A Hybrid Adaptive Scheme based on Selective Gaussian Modeling for Real-time Object Detection., , and . ISCAS, page 936-939. IEEE, (2009)Low-bit-rate generalized quad-tree motion compensation algorithm and its optimal encoding schemes., and . VCIP, volume 4067 of Proceedings of SPIE, page 230-237. SPIE, (2000)