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Using "Test Model-Checking" to Verify the Runway-PA8000 Memory Model., , , and . SPAA, page 231-239. ACM, (1998)Verification Methods for Weaker Shared Memory Consistency Models., and . IPDPS Workshops, volume 1800 of Lecture Notes in Computer Science, page 985-992. Springer, (2000)Symbolic Trajectory Evaluation: The primary validation Vehicle for next generation Intel® Processor Graphics FPU., , and . FMCAD, page 149-156. IEEE, (2012)Applications of Hierarchical Verification in Model Checking., , and . FMCAD, volume 1954 of Lecture Notes in Computer Science, Springer, (2000)Applications of Hierarchical Verification in Model Checking., , and . CHARME, volume 2144 of Lecture Notes in Computer Science, page 40-57. Springer, (2001)Formally Verifying Graphics FPU - An Intel® Experience., , and . FM, volume 8442 of Lecture Notes in Computer Science, page 673-687. Springer, (2014)The 'Test Model-Checking' Approach to the Verification of Formal Memory Models of Multiprocessors., , , and . CAV, volume 1427 of Lecture Notes in Computer Science, page 464-476. Springer, (1998)Formal modeling and validation applied to a commercial coherent bus: a case study., , , , and . CHARME, volume 105 of IFIP Conference Proceedings, page 48-62. Chapman & Hall, (1997)