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Disambiguation of "Nalumasu, Ratan"

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Using "Test Model-Checking" to Verify the Runway-PA8000 Memory Model.

, , , and . SPAA, page 231-239. ACM, (1998)

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Pakdeekul Ratana

Nikhil Ratanje

Arom Ratanavichien

Chariya Ratanarat

Adisorn Ratanaphan

 

Other publications of authors with the same name

Using "Test Model-Checking" to Verify the Runway-PA8000 Memory Model., , , and . SPAA, page 231-239. ACM, (1998)Deriving Efficient Cache Coherence Protocols Through Refinement., and . Formal Methods Syst. Des., 20 (1): 107-125 (2002)PV: An Explicit Enumeration Model-Checker., and . FMCAD, volume 1522 of Lecture Notes in Computer Science, page 523-528. Springer, (1998)An Efficient Partial Order Reduction Algorithm with an Alternative Proviso Implementation., and . Formal Methods Syst. Des., 20 (3): 231-247 (2002)The 'Test Model-Checking' Approach to the Verification of Formal Memory Models of Multiprocessors., , , and . CAV, volume 1427 of Lecture Notes in Computer Science, page 464-476. Springer, (1998)Deriving Efficient Cache Coherence Protocols through Refinement., and . IPPS/SPDP Workshops, volume 1388 of Lecture Notes in Computer Science, page 857-870. Springer, (1998)Formal modeling and validation applied to a commercial coherent bus: a case study., , , , and . CHARME, volume 105 of IFIP Conference Proceedings, page 48-62. Chapman & Hall, (1997)