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Disambiguation of "Shoaei, Omid"

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Implementation of Multiplier Block with Reduced Adder Cost.

, , , and . ICECS, page 842-845. IEEE, (2006)

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Mohammad-Reza Omidi

Mohammed-Esmail Omidi

Sirous Omid

Omid Rezania

Omid Abri

 

Other publications of authors with the same name

A 1.55 μW Bio-Impedance Measurement System for Implantable Cardiac Pacemakers in 0.18 μm CMOS., , , and . IEEE Trans. Biomed. Circuits Syst., 12 (1): 211-221 (2018)Statistical estimation of delay in nano-scale CMOS circuits using Burr Distribution., , and . Microelectron. J., (2018)A New IIP2 Enhancement Technique for CMOS Down-Converter Mixers., and . IEEE Trans. Circuits Syst. II Express Briefs, 54-II (12): 1062-1066 (2007)A 1.5-V 12-bit 75M-samples/s fully-differential low-power sample-and-hold amplifier in 0.25-μm CMOS., , and . ICECS, page 814-817. IEEE, (2003)On the parasitic-sensitivity of switched-capacitor summing-integrator structures for ΣΔ modulators., , , and . IEEE Trans. Circuits Syst. II Express Briefs, 50 (9): 634-640 (2003)Fast Background Calibration of Linear and Non-Linear Errors in Pipeline Analog-to-Digital Converters., and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (3): 884-888 (2022)A CMOS high IIP2 mixer for multi-standard receivers., and . ISCAS, page 656-659. IEEE, (2008)A new multiply-by-two gain-stage with enhanced immunity to capacitor-mismatch., , and . ISCAS (2), page 1409-1412. IEEE, (2005)Digital background calibration of pipeline ADC with open-loop gain stage., and . ISCAS, IEEE, (2006)A low-power design methodology for high-resolution pipelined analog-to-digital converters., , , and . ISLPED, page 334-339. ACM, (2003)