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Contention-Free High-Speed Clock-Gate based on Set/Reset Latch for Wide Voltage Scaling.

, , , , , , , , , , and . ISCAS, page 1-5. IEEE, (2018)

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An efficient dual-supply design for low-power mobile systems., , , , and . ISOCC, page 359-362. IEEE, (2012)Scan-controlled pulse flip-flops for mobile application processors., , , , , , , , , and 1 other author(s). ISCAS, page 769-772. IEEE, (2013)A 1.6 GHz quad-core application processor manufactured in 32 nm high-k metal gate process for smart mobile devices., , , and . IEEE Communications Magazine, 51 (4): 94-98 (2013)A 32nm high-k metal gate application processor with GHz multi-core CPU., , , , , , , , , and 10 other author(s). ISSCC, page 214-216. IEEE, (2012)Session 26 overview: Processor-power management and clocking., , and . ISSCC, page 436-437. IEEE, (2017)Contention-Free High-Speed Clock-Gate based on Set/Reset Latch for Wide Voltage Scaling., , , , , , , , , and 1 other author(s). ISCAS, page 1-5. IEEE, (2018)Session 23 overview: Low-power SoCs: High-performance digital subcommittee., and . ISSCC, page 418-419. IEEE, (2015)A DTMOST-based Temperature Sensor with 3σ Inaccuracy of ±0.9°C for Self-Refresh Control in 28nm Mobile DRAM., , , , , , and . CICC, page 1-4. IEEE, (2020)Single-ended D flip-flop with implicit scan mux for high performance mobile AP., , , , , , , , , and 2 other author(s). SoCC, page 91-95. IEEE, (2016)28nm high- metal-gate heterogeneous quad-core CPUs for high-performance and energy-efficient mobile application processor., , , , , , , , , and 9 other author(s). ISSCC, page 154-155. IEEE, (2013)