( en | de | ru )

 

Disambiguation of "Mahapatra, Rabi N."

Author of the publication

copydeleteadd this publication to your clipboard
Exploring topologies for source-synchronous ring-based network-on-chip.

, , and . DATE, page 1026-1031. EDA Consortium San Jose, CA, USA / ACM DL, (2013)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

n n n

Lakshman Mahapatra

Suddhasatta Mahapatra

Rabi Massaji

Rabi Chahin

 

Other publications of authors with the same name

A Dynamic Slack Management Technique for Real-Time Distributed Embedded Systems., and . IEEE Trans. Computers, 57 (2): 215-230 (2008)Fully associative cache partitioning with don't care bits for real-time applications., and . SIGBED Review, 2 (2): 35-38 (2005)TCAM enabled on-chip logic minimization., and . DAC, page 678-683. ACM, (2005)Dynamic context management for low power coarse-grained reconfigurable architecture., and . ACM Great Lakes Symposium on VLSI, page 33-38. ACM, (2009)Dynamic Context Compression for Low-Power Coarse-Grained Reconfigurable Architecture., and . IEEE Trans. Very Large Scale Integr. Syst., 18 (1): 15-28 (2010)Modelling a 2-D inverse fast cosine transform algorithm on a multistage network., and . Signal Process., 30 (2): 235-243 (1993)Mapping of Neural Network Models Onto Two-Dimensional Processor Arrays., and . Parallel Comput., 22 (10): 1345-1357 (1996)Adaptive Group-Based Zero Knowledge Proof-Authentication Protocol in Vehicular Ad Hoc Networks., , and . IEEE Trans. Intell. Transp. Syst., 21 (2): 867-881 (2020)Modelling a Morphological thinning Algorithm for Shared Memory SIMD Computers., , and . Parallel Process. Lett., (1991)Mapping of neural network models onto massively parallel hierarchical computer systems., , and . J. Syst. Archit., 45 (11): 919-929 (1999)