( en | de | ru )

 

Disambiguation of "Marques, Augusto Manuel"

Author of the publication

copydeleteadd this publication to your clipboard
A 15-b resolution 2-MHz Nyquist rate ΔΣ ADC in a 1-μm CMOS technology.

, , , and . IEEE J. Solid State Circuits, 33 (7): 1065-1075 (1998)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Manuel Joaquim Marques Garrido

Augusto Manuel Freire Cardoso Mira

Manuel Augusto Abranches Enes Martins

António Marques

Ricardo Marques

 

Other publications of authors with the same name

A 900-mV low-power ΔΣ A/D converter with 77-dB dynamic range., , , , and . IEEE J. Solid State Circuits, 33 (12): 1887-1897 (1998)A 15-b resolution 2-MHz Nyquist rate ΔΣ ADC in a 1-μm CMOS technology., , , and . IEEE J. Solid State Circuits, 33 (7): 1065-1075 (1998)Theory of PLL fractional-N frequency synthesizers., , and . Wirel. Networks, 4 (1): 79-85 (1998)A 12 bit 200 MHz low glitch CMOS D/A converter., , , , , , , , and . CICC, page 249-252. IEEE, (1998)Settling time analysis of third order systems., , , and . ICECS, page 505-508. IEEE, (1998)A current steering architecture for 12-bit high-speed D/A converters., , , and . ICECS, page 23-26. IEEE, (1998)Analysis of the trade-off between bandwidth, resolution, and power in ΔΣ analog to digital converters., , , and . ICECS, page 153-156. IEEE, (1998)A 3.3-V, 15-bit, delta-sigma ADC with a signal bandwidth of 1.1 MHz for ADSL applications., , , and . IEEE J. Solid State Circuits, 34 (7): 927-936 (1999)A 12-bit intrinsic accuracy high-speed CMOS DAC., , , and . IEEE J. Solid State Circuits, 33 (12): 1959-1969 (1998)