Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Analysis and modeling of power grid transmission lines.

J. Balachandran, S. Brebels, G. Carchon, T. Webers, W. Raedt, B. Nauwelaers, and E. Beyne. DATE, page 33-38. European Design and Automation Association, Leuven, Belgium, (2006)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Emmanuelle Beyne

Dimitry Beynenson

Ull Erich

Hauke Erichsen

Gerda Erich

Other publications of authors with the same name

IP Session on Chiplet: Design, Assembly, and Test.B. Vinnakota, J. Derakhshandeh, E. Beyne, E. Marinissen, and S. Chakravarty. VTS, page 1. IEEE, (2023)System Level Comparison of 3D Integration Technologies for Future Mobile MPSoC Platform.P. Agrawal, D. Milojevic, P. Raghavan, F. Catthoor, L. der Perre, E. Beyne, and R. Varadarajan. IEEE Embed. Syst. Lett., 6 (4): 85-88 (2014)Impact of via density and passivation thickness on the mechanical integrity of advanced Back-End-Of-Line interconnects.L. Kljucar, M. Gonzalez, K. Croes, I. Wolf, J. Messemaeker, G. Murdoch, P. Nolmans, J. Vos, J. Bömmels, E. Beyne and 1 other author(s). Microelectron. Reliab., (2017)3D chip package interaction thermo-mechanical challenges: Proximity effects of Through Silicon vias and μ-bumps.W. Guo, G. der Plas, A. Ivankovic, G. Eneman, V. Cherman, B. Wachter, A. Mercha, M. Gonzalez, Y. Civale, A. Redolfi and 9 other author(s). ICICDT, page 1-4. IEEE, (2012)Through silicon via to FinFET noise coupling in 3-D integrated circuits.A. Abadi, W. Guo, X. Sun, K. Ali, J. Raskin, M. Rack, C. Neve, M. Choi, V. Moroz, G. der Plas and 3 other author(s). ICICDT, page 1-4. IEEE, (2015)Tutorial T7A: Advanced IC Packaging.E. Beyne. VLSI Design, page 10. IEEE Computer Society, (2007)Constant impedance scaling paradigm for interconnect synthesis.J. Balachandran, S. Brebels, G. Carchon, M. Kuijk, W. Raedt, B. Nauwelaers, and E. Beyne. SLIP, page 99-105. ACM, (2006)300mm wafer thinning and backside passivation compatibility with temporary wafer bonding for 3D stacked IC applications.A. Jourdain, T. Buisson, A. Phommahaxay, M. Privett, D. Wallace, S. Sood, P. Bisson, E. Beyne, Y. Travaly, and B. Swinnen. 3DIC, page 1-4. IEEE, (2010)In-line metrology and inspection for process control during 3D stacking of IC's.S. Halder, I. Wolf, A. Phommahaxay, A. Miller, M. Maenhoudt, G. Beyer, B. Swinnen, and E. Beyne. 3DIC, page 1-4. IEEE, (2011)Si interposer build-up options and impact on 3D system cost.D. Velenis, M. Detalle, E. Marinissen, and E. Beyne. 3DIC, page 1-5. IEEE, (2013)

BibSonomy

Disambiguation of "Beyne, Eric"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Analysis and modeling of power grid transmission lines.

Please choose a person to relate this publication to

Emmanuelle Beyne

Dimitry Beynenson

Ull Erich

Hauke Erichsen

Gerda Erich

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Beyne, Eric"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Analysis and modeling of power grid transmission lines.

Please choose a person to relate this publication to

Emmanuelle Beyne

Dimitry Beynenson

Ull Erich

Hauke Erichsen

Gerda Erich

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Analysis and modeling of power grid transmission lines.