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Impact of spintronic memory on multicore cache hierarchy design.

, , and . IET Comput. Digit. Tech., 11 (2): 51-59 (2017)

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A Technique for Test Coverage Closure Using GoldMine., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 31 (5): 790-803 (2012)Cohesion: a hybrid memory model for accelerators., , , , and . ISCA, page 429-440. ACM, (2010)Rigel: an architecture and scalable programming interface for a 1000-core accelerator., , , , , , , , and . ISCA, page 140-151. ACM, (2009)Rigel: A 1, 024-Core Single-Chip Accelerator Architecture., , , , , and . IEEE Micro, 31 (4): 30-41 (2011)Cohesion: An Adaptive Hybrid Memory Model for Accelerators., , , , and . IEEE Micro, 31 (1): 42-55 (2011)Improving Energy and Performance with Spintronics Caches in Multicore Systems., , , , and . Euro-Par Workshops (2), volume 8806 of Lecture Notes in Computer Science, page 279-290. Springer, (2014)GoldMine: Automatic assertion generation using data mining and static analysis., , , , , and . DATE, page 626-629. IEEE Computer Society, (2010)Impact of spintronic memory on multicore cache hierarchy design., , and . IET Comput. Digit. Tech., 11 (2): 51-59 (2017)Towards coverage closure: Using GoldMine assertions for generating design validation stimulus., , , and . DATE, page 173-178. IEEE, (2011)