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Reducing instruction memory energy consumption by using Instruction Buffer and after scheduling analysis.

, , and . SoC, page 99-102. IEEE, (2010)

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Resource Conflict Detection in Simulation of Function Unit Pipelines., , and . SAMOS, volume 4599 of Lecture Notes in Computer Science, page 233-240. Springer, (2007)Effects of loop unrolling and use of instruction buffer on processor energy consumption., , and . SoC, page 82-85. IEEE, (2011)Use of compiler optimization of software bypassing as a method to improve energy efficiency of exposed data path architectures., , and . EURASIP J. Embed. Syst., (2013)Resource conflict detection in simulation of function unit pipelines., , and . J. Syst. Archit., 54 (11): 1058-1064 (2008)Turbo decoding on tailored OpenCL processor., , , , , , , and . IWCMC, page 1095-1100. IEEE, (2013)Impact of Software Bypassing on Instruction Level Parallelism and Register File Traffic., , , and . SAMOS, volume 5114 of Lecture Notes in Computer Science, page 23-32. Springer, (2008)Trade-offs in mapping high-level dataflow graphs onto ASIPs., , , and . SoC, page 1-4. IEEE, (2008)Instruction buffer with limited control flow and loop nest support., , and . ICSAMOS, page 263-269. IEEE, (2011)A 122Mb/s Turbo decoder using a mid-range GPU., , , , and . IWCMC, page 1090-1094. IEEE, (2013)Reducing processor energy consumption by compiler optimization., , , and . SiPS, page 063-068. IEEE, (2009)