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Disambiguation of "Pal, Subhankar"

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Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory.

, , , , , , , , , , , , and . IEEE J. Solid State Circuits, 57 (4): 986-998 (2022)

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Subhankar Bedanta

Michael Pal

Andrea Pál

Pal Dragos

Aprameyo Pal

 

Other publications of authors with the same name

Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 57 (4): 986-998 (2022)Heterogeneity-Aware Scheduling on SoCs for Autonomous Vehicles., , , , , , , , and . IEEE Comput. Archit. Lett., 20 (2): 82-85 (2021)A Holistic Solution for Reliability of 3D Parallel Systems., , , , and . ACM J. Emerg. Technol. Comput. Syst., 18 (1): 23:1-23:27 (2022)xURLCC in 6g with meshed RAN., , , , , and . CoRR, (2023)Towards Closing the Programmability-Efficiency Gap using Software-Defined Hardware.. University of Michigan, USA, (2021)Efficient Management of Scratch-Pad Memories in Deep Learning Accelerators., , , and . ISPASS, page 240-242. IEEE, (2021)Accelerating Deep Neural Network Computation on a Low Power Reconfigurable Architecture., , , , , , , and . ISCAS, page 1-5. IEEE, (2020)R2D3: A Reliability Engine for 3D Parallel Systems., , , , and . DAC, page 1-6. IEEE, (2020)STOMP: A Tool for Evaluation of Scheduling Policies in Heterogeneous Multi-Processors., , , , , , , , and . CoRR, (2020)HE-PEx: Efficient Machine Learning under Homomorphic Encryption using Pruning, Permutation and Expansion., , , , , , , , , and 1 other author(s). CoRR, (2022)