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An Adaptive Lockstep Architecture for Mixed-Criticality Systems., , , and . ISVLSI, page 7-12. IEEE, (2021)FLECSim-SoC: A Flexible End-to-End Co-Design Simulation Framework for System on Chips., , , , and . SoCC, page 83-88. IEEE, (2021)Dynamic and scalable runtime block-based multicast routing for networks on chips., , , , and . NoCArc@MICRO, page 10:1-10:6. ACM, (2019)Leveraging Mixed-Precision CNN Inference for Increased Robustness and Energy Efficiency., , , , , , and . SOCC, page 1-6. IEEE, (2023)The ZuSE-KI-Mobil AI Accelerator SoC: Overview and a Functional Safety Perspective., , , , , , , , , and 8 other author(s). DATE, page 1-6. IEEE, (2023)Data Movement Reduction for DNN Accelerators: Enabling Dynamic Quantization Through an eFPGA., , , , and . ISVLSI, page 371-372. IEEE, (2022)Leveraging Adaptive Redundancy in Multi-Core Processors for Realizing Adaptive Fault Tolerance in Mixed-Criticality Systems., and . MECO, page 1-5. IEEE, (2023)Einsatz von kollaborativen virtuellen Umgebungen bei der berufsbegleitenden Weiterbildung, , and . Journal of Technical Education (JOTED), (2013)Automated Replacement of State-Holding Flip-Flops to Enable Non-Volatile Checkpointing., , , , , , and . NorCAS, page 1-7. IEEE, (2023)Runtime Adaptive Cache Checkpointing for RISC Multi-Core Processors., , , , , and . SOCC, page 1-6. IEEE, (2022)