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Geyser-2: The second prototype CPU with fine-grained run-time power gating., , , , , , , , , and 7 other author(s). ASP-DAC, page 87-88. IEEE, (2011)A fine-grain dynamic sleep control scheme in MIPS R3000., , , , , , , , , and 7 other author(s). ICCD, page 612-617. IEEE Computer Society, (2008)Sleep Transistor Sizing Method Using Accurate Delay Estimation Considering Input Vector Pattern and Non-linear Current Model., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 94-A (12): 2499-2509 (2011)Design and Implementation of Fine-Grain Power Gating with Ground Bounce Suppression., , , , , , , , , and 2 other author(s). VLSI Design, page 381-386. IEEE Computer Society, (2009)Leakage power reduction for coarse grained dynamically reconfigurable processor arrays with fine grained Power Gating technique., , , , , , , , , and 1 other author(s). FPT, page 329-332. IEEE, (2008)Geyser-1: a MIPS R3000 CPU core with fine-grained run-time power gating., , , , , , , , , and 6 other author(s). ASP-DAC, page 369-370. IEEE, (2010)A novel power-gating scheme utilizing data retentiveness on caches., , , and . ACM Great Lakes Symposium on VLSI, page 91-94. ACM, (2012)Evaluation of a New Power-Gating Scheme Utilizing Data Retentiveness on Caches., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 95-A (12): 2301-2308 (2012)Efficient leakage power saving by sleep depth controlling for Multi-mode Power Gating., , , and . ISQED, page 625-632. IEEE, (2012)Stepwise sleep depth control for run-time leakage power saving., , , and . ACM Great Lakes Symposium on VLSI, page 233-238. ACM, (2012)