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Digital ground bounce reduction by supply current shaping and clock frequency Modulation., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (1): 65-76 (2005)Globally Reliable Variation-Aware Sizing of Analog Integrated Circuits via Response Surfaces and Structural Homotopy., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 28 (11): 1627-1640 (2009)Self-adaptive lower confidence bound: A new general and effective prescreening method for Gaussian Process surrogate model assisted evolutionary algorithms., , , and . IEEE Congress on Evolutionary Computation, page 1-6. IEEE, (2012)Systematic design exploration of delta-sigma ADCs., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 51-I (1): 86-95 (2004)A performance-driven placement tool for analog integrated circuits., , and . IEEE J. Solid State Circuits, 30 (7): 773-780 (July 1995)Understanding the Impact of Time-Dependent Random Variability on Analog ICs: From Single Transistor Measurements to Circuit Simulations., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (3): 601-610 (2019)High-Level Power Minimization of Analog Sensor Interface Architectures., , and . Integr. Comput. Aided Eng., 5 (4): 303-314 (1998)Boosting Latent Defect Coverage in Automotive Mixed-Signal ICs Using SVM Classifiers., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (10): 3426-3435 (October 2023)A reconfigurable, 0.13µm CMOS 110pJ/pulse, fully integrated IR-UWB receiver for communication and sub-cm ranging., , , and . ISSCC, page 250-251. IEEE, (2009)Regression criteria and their application in different modeling cases., , , , and . ISCAS (5), page 85-8. IEEE, (2002)