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In-Situ Delay Characterization and Local Supply Voltage Adjustment for Compensation of Local Parametric Variations.

, , , , and . IEEE J. Solid State Circuits, 42 (7): 1583-1592 (2007)

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From Device Aging Physics to Automated Circuit Reliability Sign Off., , , , , , and . IRPS, page 1-12. IEEE, (2019)Soft Error Rates in 65nm SRAMs--Analysis of new Phenomena., and . IOLTS, page 203-204. IEEE Computer Society, (2007)In situ measurement of aging-induced performance degradation in digital circuits., , , , , and . ETS, page 1-2. IEEE, (2016)Power efficient digital IC design for a medical application with high reliability requirements., , , , , , , , and . PATMOS, page 1-5. IEEE, (2014)From an analytic NBTI device model to reliability assessment of complex digital circuits., , , , , and . IOLTS, page 19-24. IEEE, (2014)In situ measurement of aging-induced performance degradation in digital circuits., , , , , and . ETS, page 1-2. IEEE, (2016)On-Line Supply voltage Scaling Based on in situ Delay Monitoring to Adapt for Pvta variations., , , , and . Journal of Circuits, Systems, and Computers, (2012)Reliability monitoring of digital circuits by in situ timing measurement., , and . PATMOS, page 150-156. IEEE, (2013)Layout options for stability tuning of SRAM cells in multi-gate-FET technologies., , , , , , , , , and 3 other author(s). ESSCIRC, page 392-395. IEEE, (2007)Fast stability analysis of large-scale SRAM arrays and the impact of NBTI degradation., , , , , , , and . ESSCIRC, page 92-95. IEEE, (2009)