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Disambiguation of "Sinha, Sharad"

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Low-Power FPGA Design Using Memoization-Based Approximate Computing.

, and . IEEE Trans. Very Large Scale Integr. Syst., 24 (8): 2665-2678 (2016)

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Prashant Sinha

Intermediate states in bivalent ion induced shrinking of polyacrylate coils on surfaces and in solution. TU Dresden, (2009)

Sharad Chandra

Sharad Prasad

Vineet Sinha

Jyoti Sinha

 

Other publications of authors with the same name

FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs., , , , and . FPGA, page 15-25. ACM, (2023)Towards Efficient and Scalable Acceleration of Online Decision Tree Learning on FPGA., , and . FCCM, page 172-180. IEEE, (2019)Decision tree based hardware power monitoring for run time dynamic power management in FPGA., , and . FPL, page 1-8. IEEE, (2017)Load-Step: A Precise TrustZone Execution Control Framework for Exploring New Side-channel Attacks Like Flush+Evict., , , and . DAC, page 979-984. IEEE, (2021)A hybrid approach to cache management in heterogeneous CPU-FPGA platforms., , , and . ICCAD, page 937-944. IEEE, (2017)A Collaborative Framework for FPGA-based CNN Design Modeling and Optimization., , , and . FPL, page 139-146. IEEE Computer Society, (2018)Message from Workshop Chairs., , , , and . HiPCW, page 1-3. IEEE, (2023)YOLORe-IDNet: An Efficient Multi-camera System for Person-Tracking., , and . CVIP (1), volume 2009 of Communications in Computer and Information Science, page 185-197. Springer, (2023)Low-Power FPGA Design Using Memoization-Based Approximate Computing., and . IEEE Trans. Very Large Scale Integr. Syst., 24 (8): 2665-2678 (2016)Static hardware task placement on multi-context FPGA using hybrid genetic algorithm., , , and . FPL, page 1-8. IEEE, (2015)