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A body-biasing of readout circuit for STT-RAM with improved thermal reliability., , , , , и . ISCAS, стр. 1530-1533. IEEE, (2015)A Study of 3-D Power Delivery Networks With Multiple Clock Domains., и . IEEE Trans. Very Large Scale Integr. Syst., 24 (11): 3218-3231 (2016)NEAR: A Novel Energy Aware Replacement Policy for STT-MRAM LLCs., , , , и . ISCAS, стр. 1-5. IEEE, (2018)Power Supply Noise Aware Task Scheduling on Homogeneous 3D MPSoCs Considering the Thermal Constraint., , , , и . J. Comput. Sci. Technol., 33 (5): 966-983 (2018)STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator., , , , , и . IEEE Trans. Very Large Scale Integr. Syst., 25 (4): 1285-1296 (2017)PSI Conscious Write Scheduling: Architectural Support for Reliable Power Delivery in 3-D Die-Stacked PCM., , , , , и . IEEE Trans. Very Large Scale Integr. Syst., 24 (5): 1613-1625 (2016)Channel Modeling and Reliability Enhancement Design Techniques for STT-MRAM., , , , , , и . ISVLSI, стр. 461-466. IEEE Computer Society, (2015)SIP: Boosting Up Graph Computing by Separating the Irregular Property Data., , и . ACM Great Lakes Symposium on VLSI, стр. 15-20. ACM, (2020)An efficient all-digital IR-Drop Alarmer for DVFS-based SoC., , , , , , , , , и . ISCAS, стр. 221-224. IEEE, (2016)A case of precision-tunable STT-RAM memory design for approximate neural network., , , , , и . ISCAS, стр. 1534-1537. IEEE, (2015)