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Disambiguation of "Despain, Alvin M."

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Design and evaluation of a hierarchical decoupled architecture.

, , , and . J. Supercomput., 38 (3): 237-259 (2006)

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Alvin Cheung

Lars Alvincz

Stephanie Alvino

Jessalyn Alvina

Kim Alving

 

Other publications of authors with the same name

Pipeline and Parallel-Pipeline FFT Processors for VLSI Implementations., and . IEEE Trans. Computers, 33 (5): 414-426 (1984)The Aquarius IIU System., , , , and . ICSI, page 38-46. IEEE Computer Society, (1990)High Level Synthesis of Pipelined Instruction Set Processors and Back-End Compilers., and . DAC, page 135-140. IEEE Computer Society Press, (1992)Cache design trade-offs for power and performance optimization: a case study., and . ISLPD, page 63-68. ACM, (1995)Design and Analysis of Hardware for High-Performance Prolog., , , , and . J. Log. Program., 29 (1-3): 107-139 (1996)Low-power state assignment targeting two- and multilevel logic implementations., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (12): 1281-1291 (1998)Design decisions influencing the microarchitecture for a Prolog machine., , and . MICRO, page 217-231. ACM/IEEE, (1984)Hardware-software co-designing benchmark-driven superpipelined instruction set processors., and . COMPSAC, IEEE, (1994)An extended classification of inter-instruction dependency and its application in automatic synthesis of pipelined processors., and . MICRO, page 236-246. ACM / IEEE Computer Society, (1993)Low power state assignment targeting two-and multi-level logic implementations., , , and . ICCAD, page 82-87. IEEE Computer Society / ACM, (1994)