( en | de | ru )

 

Disambiguation of "Albericio, Jorge"

Author of the publication

copydeleteadd this publication to your clipboard
Doppelganger: A Cache for Approximate Computing

, , , and . In Proceedings of the International Symposium on Microarchitecture, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Jay Jorgenson

Helmut Jörgens

Konrad Jörgens

Ingeborg Jörges

Heinz Jörgens

 

Other publications of authors with the same name

The reuse cache: downsizing the shared last-level cache., , , and . MICRO, page 310-321. ACM, (2013)Practical Multidimensional Branch Prediction., , and . IEEE Micro, 36 (3): 10-19 (2016)Bit-pragmatic deep neural network computing., , , , , , and . MICRO, page 382-394. ACM, (2017)Doppelgänger: a cache for approximate computing., , , and . MICRO, page 50-61. ACM, (2015)ABS: A low-cost adaptive controller for prefetching in a banked shared last-level cache., , , , and . ACM Trans. Archit. Code Optim., 8 (4): 19:1-19:20 (2012)Characterization and cost-efficient selection of NoC topologies for general purpose CMPs., , , , , , and . INA-OCMC@HiPEAC, page 21-24. ACM, (2013)Doppelganger: A Cache for Approximate Computing, , , and . In Proceedings of the International Symposium on Microarchitecture, (2015)Evaluating the memory system behavior of smartphone workloads., , , , , , , , , and 1 other author(s). ICSAMOS, page 83-92. IEEE, (2014)Identifying and Exploiting Ineffectual Computations to Enable Hardware Acceleration of Deep Learning., , , , , , , , , and 3 other author(s). NEWCAS, page 356-360. IEEE, (2018)The inner most loop iteration counter: a new dimension in branch history., , and . MICRO, page 347-357. ACM, (2015)