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Disambiguation of "Gielen, Georges G. E."

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Massively multi-topology sizing of analog integrated circuits.

, , , and . DATE, page 706-711. IEEE, (2009)

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Georges Gielen

Marlis Gielen

Michael E G Kaes

Volker E G Beckmann

G E M Panhuysen

 

Other publications of authors with the same name

Understanding the Impact of Time-Dependent Random Variability on Analog ICs: From Single Transistor Measurements to Circuit Simulations., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (3): 601-610 (2019)High-Level Power Minimization of Analog Sensor Interface Architectures., , and . Integr. Comput. Aided Eng., 5 (4): 303-314 (1998)Boosting Latent Defect Coverage in Automotive Mixed-Signal ICs Using SVM Classifiers., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (10): 3426-3435 (October 2023)Hierarchical Modeling, Optimization, and Synthesis for System-Level Analog and RF Designs., , and . Proc. IEEE, 95 (3): 640-669 (2007)Circuit models for the co-simulation of superconducting quantum computing systems., , , , , , , and . DATE, page 968-973. IEEE, (2021)An enhanced MOEA/D-DE and its application to multiobjective analog cell sizing., , , , , and . IEEE Congress on Evolutionary Computation, page 1-7. IEEE, (2010)Fuzzy selection based differential evolution algorithm for analog cell sizing capturing imprecise human intentions., , and . IEEE Congress on Evolutionary Computation, page 622-629. IEEE, (2009)An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits., , and . DAC, page 431-436. ACM, (2002)Behavioral modeling of (coupled) harmonic oscillators., , and . DAC, page 536-541. ACM, (2002)Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients., , , , , , and . DAC, page 399-404. ACM, (2002)